THE APEX TIMES
Waymo reportedly built its own AI chip, aiming to cut reliance on Nvidia
A reported application-specific chip designed for Waymo’s driverless systems reportedly targets performance above 1,000 TOPS using TSMC’s 5-nanometer process.
Alphabet’s Waymo is reportedly moving to use an in-house AI chip for parts of its self-driving workload, a step that could reduce its dependence on Nvidia hardware for training and inference. The move centers on an application-specific integrated circuit, or ASIC, built for the specific compute patterns involved in autonomous driving rather than general-purpose graphics processing.
According to the report, the chip’s performance is described as running above 1,000 TOPS. TOPS, short for tera-operations per second, is a common metric used to summarize how much arithmetic a chip can perform per second for AI workloads, particularly neural network operations.
The same report says the ASIC is being fabricated on TSMC’s 5-nanometer process. TSMC’s 5nm node is a leading-edge manufacturing technology that helps vendors pack more transistors into the same area and improve power efficiency, both critical for large AI stacks in vehicles.
While details on how Waymo will deploy the chip are not spelled out in the report, the implication is straightforward: if Waymo can run more of its perception or related compute on its own silicon, it can potentially lower system costs, improve power efficiency, and reduce supplier concentration risk. It can also customize the chip’s performance characteristics to match Waymo’s software pipeline.
Nvidia has been the dominant supplier of AI compute for much of the industry, particularly for training and for building systems that run large neural networks. But the autonomous-driving sector has increasingly explored custom silicon, where companies try to balance performance, latency, and integration with specialized workloads such as sensor processing and real-time decision-making.
Even if Nvidia remains important for parts of Waymo’s ecosystem, a shift toward internal accelerators can still matter commercially. It affects the share of AI hardware spend captured by Nvidia and may influence how Nvidia designs future platforms intended for edge deployment in vehicles and robotics.
What is not clear from the reporting so far is the chip’s full scope of use within Waymo’s stack, the exact software models it supports, and whether Waymo will scale production for fleet-wide deployment. The report also does not provide any disclosure about cost, procurement terms, or whether Nvidia systems will be phased out entirely.
Looking ahead, investors and industry watchers will likely focus on whether Waymo expands this approach beyond prototypes, how quickly it integrates the ASIC into production systems, and whether other autonomous-driving operators follow suit with similar custom silicon strategies. For Nvidia, the question is whether such efforts translate into measurable reductions in demand for its accelerators in the automotive and robotics markets.
Why It Matters
- Custom silicon could reduce an operator’s reliance on a single AI hardware supplier for edge inference.
- If deployed broadly, chips targeting high TOPS-per-watt could improve real-time performance in vehicles.
- A shift toward ASICs in autonomy may pressure general-purpose AI platforms to prove they can meet latency and efficiency needs at the edge.
- The market may watch for whether other autonomous-driving companies accelerate their own custom chip programs as well.
Key Facts
- The report says Waymo is building an in-house ASIC to support parts of its autonomous-driving compute.
- The ASIC is described as achieving performance above 1,000 TOPS.
- The chip is reported to be fabricated using TSMC’s 5-nanometer process.
- The report characterizes the effort as reducing Waymo’s dependence on Nvidia hardware.
- No additional deployment details, commercial terms, or timelines are provided in the report.
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